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nfqws,tpws: seccomp riscv64 compat

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bol-van 2024-09-15 12:10:04 +03:00
parent 6cedc7301d
commit 12162f10e7
4 changed files with 12 additions and 18 deletions
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2
nfq/sec.c
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@ -117,7 +117,9 @@ SYS_rename,
#ifdef SYS_renameat2 #ifdef SYS_renameat2
SYS_renameat2, SYS_renameat2,
#endif #endif
#ifdef SYS_renameat
SYS_renameat, SYS_renameat,
#endif
#ifdef SYS_readdir #ifdef SYS_readdir
SYS_readdir, SYS_readdir,
#endif #endif

13
nfq/sec.h
View File

@ -20,17 +20,14 @@ bool dropcaps(void);
#if defined(__aarch64__) #if defined(__aarch64__)
# define REG_SYSCALL regs.regs[8]
# define ARCH_NR AUDIT_ARCH_AARCH64 # define ARCH_NR AUDIT_ARCH_AARCH64
#elif defined(__amd64__) #elif defined(__amd64__)
# define REG_SYSCALL REG_RAX
# define ARCH_NR AUDIT_ARCH_X86_64 # define ARCH_NR AUDIT_ARCH_X86_64
#elif defined(__arm__) && (defined(__ARM_EABI__) || defined(__thumb__)) #elif defined(__arm__) && (defined(__ARM_EABI__) || defined(__thumb__))
# define REG_SYSCALL regs.uregs[7]
# if __BYTE_ORDER == __LITTLE_ENDIAN # if __BYTE_ORDER == __LITTLE_ENDIAN
# define ARCH_NR AUDIT_ARCH_ARM # define ARCH_NR AUDIT_ARCH_ARM
# else # else
@ -39,13 +36,10 @@ bool dropcaps(void);
#elif defined(__i386__) #elif defined(__i386__)
# define REG_SYSCALL REG_EAX
# define ARCH_NR AUDIT_ARCH_I386 # define ARCH_NR AUDIT_ARCH_I386
#elif defined(__mips__) #elif defined(__mips__)
# define REG_SYSCALL regs[2]
#if _MIPS_SIM == _MIPS_SIM_ABI32 #if _MIPS_SIM == _MIPS_SIM_ABI32
# if __BYTE_ORDER == __LITTLE_ENDIAN # if __BYTE_ORDER == __LITTLE_ENDIAN
# define ARCH_NR AUDIT_ARCH_MIPSEL # define ARCH_NR AUDIT_ARCH_MIPSEL
@ -64,8 +58,6 @@ bool dropcaps(void);
#elif defined(__PPC64__) #elif defined(__PPC64__)
# define REG_SYSCALL regs.gpr[0]
# if __BYTE_ORDER == __LITTLE_ENDIAN # if __BYTE_ORDER == __LITTLE_ENDIAN
# define ARCH_NR AUDIT_ARCH_PPC64LE # define ARCH_NR AUDIT_ARCH_PPC64LE
# else # else
@ -74,9 +66,12 @@ bool dropcaps(void);
#elif defined(__PPC__) #elif defined(__PPC__)
# define REG_SYSCALL regs.gpr[0]
# define ARCH_NR AUDIT_ARCH_PPC # define ARCH_NR AUDIT_ARCH_PPC
#elif __riscv && __riscv_xlen == 64
# define ARCH_NR AUDIT_ARCH_RISCV64
#else #else
# error "Platform does not support seccomp filter yet" # error "Platform does not support seccomp filter yet"

2
tpws/sec.c
View File

@ -96,7 +96,9 @@ SYS_rename,
#ifdef SYS_renameat2 #ifdef SYS_renameat2
SYS_renameat2, SYS_renameat2,
#endif #endif
#ifdef SYS_renameat
SYS_renameat, SYS_renameat,
#endif
#ifdef SYS_readdir #ifdef SYS_readdir
SYS_readdir, SYS_readdir,
#endif #endif

13
tpws/sec.h
View File

@ -22,17 +22,14 @@ bool dropcaps(void);
#if defined(__aarch64__) #if defined(__aarch64__)
# define REG_SYSCALL regs.regs[8]
# define ARCH_NR AUDIT_ARCH_AARCH64 # define ARCH_NR AUDIT_ARCH_AARCH64
#elif defined(__amd64__) #elif defined(__amd64__)
# define REG_SYSCALL REG_RAX
# define ARCH_NR AUDIT_ARCH_X86_64 # define ARCH_NR AUDIT_ARCH_X86_64
#elif defined(__arm__) && (defined(__ARM_EABI__) || defined(__thumb__)) #elif defined(__arm__) && (defined(__ARM_EABI__) || defined(__thumb__))
# define REG_SYSCALL regs.uregs[7]
# if __BYTE_ORDER == __LITTLE_ENDIAN # if __BYTE_ORDER == __LITTLE_ENDIAN
# define ARCH_NR AUDIT_ARCH_ARM # define ARCH_NR AUDIT_ARCH_ARM
# else # else
@ -41,13 +38,10 @@ bool dropcaps(void);
#elif defined(__i386__) #elif defined(__i386__)
# define REG_SYSCALL REG_EAX
# define ARCH_NR AUDIT_ARCH_I386 # define ARCH_NR AUDIT_ARCH_I386
#elif defined(__mips__) #elif defined(__mips__)
# define REG_SYSCALL regs[2]
#if _MIPS_SIM == _MIPS_SIM_ABI32 #if _MIPS_SIM == _MIPS_SIM_ABI32
# if __BYTE_ORDER == __LITTLE_ENDIAN # if __BYTE_ORDER == __LITTLE_ENDIAN
# define ARCH_NR AUDIT_ARCH_MIPSEL # define ARCH_NR AUDIT_ARCH_MIPSEL
@ -66,8 +60,6 @@ bool dropcaps(void);
#elif defined(__PPC64__) #elif defined(__PPC64__)
# define REG_SYSCALL regs.gpr[0]
# if __BYTE_ORDER == __LITTLE_ENDIAN # if __BYTE_ORDER == __LITTLE_ENDIAN
# define ARCH_NR AUDIT_ARCH_PPC64LE # define ARCH_NR AUDIT_ARCH_PPC64LE
# else # else
@ -76,9 +68,12 @@ bool dropcaps(void);
#elif defined(__PPC__) #elif defined(__PPC__)
# define REG_SYSCALL regs.gpr[0]
# define ARCH_NR AUDIT_ARCH_PPC # define ARCH_NR AUDIT_ARCH_PPC
#elif __riscv && __riscv_xlen == 64
# define ARCH_NR AUDIT_ARCH_RISCV64
#else #else
# error "Platform does not support seccomp filter yet" # error "Platform does not support seccomp filter yet"