From 12162f10e7aeb07008cb112dd322dd27bb25baf6 Mon Sep 17 00:00:00 2001 From: bol-van Date: Sun, 15 Sep 2024 12:10:04 +0300 Subject: [PATCH] nfqws,tpws: seccomp riscv64 compat --- nfq/sec.c | 2 ++ nfq/sec.h | 13 ++++--------- tpws/sec.c | 2 ++ tpws/sec.h | 13 ++++--------- 4 files changed, 12 insertions(+), 18 deletions(-) diff --git a/nfq/sec.c b/nfq/sec.c index 05efc97..b6f8e66 100644 --- a/nfq/sec.c +++ b/nfq/sec.c @@ -117,7 +117,9 @@ SYS_rename, #ifdef SYS_renameat2 SYS_renameat2, #endif +#ifdef SYS_renameat SYS_renameat, +#endif #ifdef SYS_readdir SYS_readdir, #endif diff --git a/nfq/sec.h b/nfq/sec.h index 9a17224..5038225 100644 --- a/nfq/sec.h +++ b/nfq/sec.h @@ -20,17 +20,14 @@ bool dropcaps(void); #if defined(__aarch64__) -# define REG_SYSCALL regs.regs[8] # define ARCH_NR AUDIT_ARCH_AARCH64 #elif defined(__amd64__) -# define REG_SYSCALL REG_RAX # define ARCH_NR AUDIT_ARCH_X86_64 #elif defined(__arm__) && (defined(__ARM_EABI__) || defined(__thumb__)) -# define REG_SYSCALL regs.uregs[7] # if __BYTE_ORDER == __LITTLE_ENDIAN # define ARCH_NR AUDIT_ARCH_ARM # else @@ -39,13 +36,10 @@ bool dropcaps(void); #elif defined(__i386__) -# define REG_SYSCALL REG_EAX # define ARCH_NR AUDIT_ARCH_I386 #elif defined(__mips__) -# define REG_SYSCALL regs[2] - #if _MIPS_SIM == _MIPS_SIM_ABI32 # if __BYTE_ORDER == __LITTLE_ENDIAN # define ARCH_NR AUDIT_ARCH_MIPSEL @@ -64,8 +58,6 @@ bool dropcaps(void); #elif defined(__PPC64__) -# define REG_SYSCALL regs.gpr[0] - # if __BYTE_ORDER == __LITTLE_ENDIAN # define ARCH_NR AUDIT_ARCH_PPC64LE # else @@ -74,9 +66,12 @@ bool dropcaps(void); #elif defined(__PPC__) -# define REG_SYSCALL regs.gpr[0] # define ARCH_NR AUDIT_ARCH_PPC +#elif __riscv && __riscv_xlen == 64 + +# define ARCH_NR AUDIT_ARCH_RISCV64 + #else # error "Platform does not support seccomp filter yet" diff --git a/tpws/sec.c b/tpws/sec.c index 3a6c210..873c875 100644 --- a/tpws/sec.c +++ b/tpws/sec.c @@ -96,7 +96,9 @@ SYS_rename, #ifdef SYS_renameat2 SYS_renameat2, #endif +#ifdef SYS_renameat SYS_renameat, +#endif #ifdef SYS_readdir SYS_readdir, #endif diff --git a/tpws/sec.h b/tpws/sec.h index ffbd92f..963d947 100644 --- a/tpws/sec.h +++ b/tpws/sec.h @@ -22,17 +22,14 @@ bool dropcaps(void); #if defined(__aarch64__) -# define REG_SYSCALL regs.regs[8] # define ARCH_NR AUDIT_ARCH_AARCH64 #elif defined(__amd64__) -# define REG_SYSCALL REG_RAX # define ARCH_NR AUDIT_ARCH_X86_64 #elif defined(__arm__) && (defined(__ARM_EABI__) || defined(__thumb__)) -# define REG_SYSCALL regs.uregs[7] # if __BYTE_ORDER == __LITTLE_ENDIAN # define ARCH_NR AUDIT_ARCH_ARM # else @@ -41,13 +38,10 @@ bool dropcaps(void); #elif defined(__i386__) -# define REG_SYSCALL REG_EAX # define ARCH_NR AUDIT_ARCH_I386 #elif defined(__mips__) -# define REG_SYSCALL regs[2] - #if _MIPS_SIM == _MIPS_SIM_ABI32 # if __BYTE_ORDER == __LITTLE_ENDIAN # define ARCH_NR AUDIT_ARCH_MIPSEL @@ -66,8 +60,6 @@ bool dropcaps(void); #elif defined(__PPC64__) -# define REG_SYSCALL regs.gpr[0] - # if __BYTE_ORDER == __LITTLE_ENDIAN # define ARCH_NR AUDIT_ARCH_PPC64LE # else @@ -76,9 +68,12 @@ bool dropcaps(void); #elif defined(__PPC__) -# define REG_SYSCALL regs.gpr[0] # define ARCH_NR AUDIT_ARCH_PPC +#elif __riscv && __riscv_xlen == 64 + +# define ARCH_NR AUDIT_ARCH_RISCV64 + #else # error "Platform does not support seccomp filter yet"